TL;DR
High Bandwidth Memory has become the main pressure point in the 2026 memory squeeze, according to Thorsten Meyer AI’s late-June report. The report says AI accelerators are absorbing wafer capacity that would otherwise support DDR5 RAM and some GDDR7 graphics-card supply.
High Bandwidth Memory has become the main capacity drain in the 2026 memory crunch, according to Thorsten Meyer AI’s late-June report, as AI-chip demand pulls fab output away from DDR5 RAM and leaves related GDDR7 GPU memory tight.
The hardware facts are well established: HBM is stacked DRAM, not a flat memory stick. It layers 8 to 16 DRAM dies, connects them with through-silicon vias, and places the stack beside an AI accelerator to feed data at far higher bandwidth than standard graphics memory.
The report says the trade-off is manufacturing efficiency. One bit of HBM can consume about three to four times the wafer area of one bit of DDR5, and one defect in a stacked package can spoil the entire memory tower. Pricing cited in the report puts HBM3 near $200 per stack, HBM3E near $300, and HBM4 at an estimated $500.
The supply claims are more provisional. Thorsten Meyer AI, citing Silicon Analysts, TrendForce, DigiTimes, Introl, Unibetter, Astute Group and Reuters, says SK Hynix leads the HBM market, with Samsung and Micron competing for the next wave. The report also says all three have qualified for HBM4, while DigiTimes-cited reporting says Nvidia cut RTX 50-series output in early 2026 as GDDR7 supply tightened.
HBM ate the fab
The thing the factories make instead of your RAM is a tower of stacked memory bolted to every AI chip. In three years it went from niche part to the component that sets the price of nearly all the world’s memory — and now a chunk of its GPUs.
A tower, not a sheet
HBM stacks DRAM dies vertically, links them with thousands of through-silicon vias, and sits beside the GPU to deliver 5–10× the bandwidth of normal graphics memory. AI is bandwidth-bound — without it, the world’s most expensive silicon sits starved for data. But stacking is inefficient: one HBM bit eats 3–4× the wafer area of DDR5, and one defect can ruin a whole tower.
≈ 8 HBM stacks wrap every AI GPUThis isn’t artificial scarcity — AI really is bandwidth-bound, HBM really is the fix, and it really does eat 3–4× its weight in fab capacity. The discomfort is structural: one component, coupled to one customer’s demand, now sets the price of nearly all memory and a slice of GPUs. The market is now $35B → ~$100B by 2028, ~41% of all DRAM revenue (was 8% in 2023), and sold out through 2026. The one hope: with all three suppliers finally racing on HBM4, competition can add supply. The matching risk: if AI demand corrects, HBM is where it breaks first. Next: DDR5 now, DDR6 soon.
AI Memory Is Repricing DRAM
The shift matters because HBM competes for fab capacity with the memory used in ordinary PCs, servers and graphics cards. If suppliers can earn far more by dedicating wafers to AI accelerators, less capacity remains for commodity DRAM and consumer GPU memory.
The report estimates the HBM market could rise from about $35 billion to nearly $100 billion by 2028, reaching around 41% of DRAM revenue after accounting for only 8% in 2023. For readers, that means the AI buildout is no longer just a data-center story; it can affect RAM prices, graphics-card availability, and upgrade costs.
High Bandwidth Memory (HBM) modules
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From H100 To Rubin
The report frames HBM’s rise around three product waves. HBM3 powered the Nvidia H100 era at roughly 819 GB/s per stack. HBM3E pushed bandwidth past 1.18 TB/s for newer accelerators such as H200 and B200.
The next step is HBM4, tied in the report to Nvidia’s coming Rubin platform and estimated at about 2.8 TB/s per stack. The report says the industry’s focus has shifted from whether major suppliers can make HBM4 to which supplier can ship it with the best yield, volume and customer alignment.
“The thing the factories make instead of your RAM is a tower of stacked memory bolted to every AI chip.”
— Thorsten Meyer AI
DDR5 RAM for gaming and workstations
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Supply Race Still Has Gaps
Several details remain unsettled. The exact wafer allocation between HBM, DDR5 and GDDR7 is not public, and the cited per-stack prices are estimates tied to a fast-changing market. Nvidia’s reported RTX 50-series cuts also remain based on industry reporting rather than a full public breakdown from the company.
It is also unclear how durable AI accelerator demand will be through 2027 and 2028. If orders keep rising, HBM supply may stay tight. If demand slows, the same concentrated market could be the first place where pricing pressure appears.
GDDR7 graphics card memory
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HBM4 Output Sets The Test
The next milestone is the HBM4 ramp from SK Hynix, Samsung and Micron. Investors, PC buyers and data-center customers will watch whether added supply eases DDR5 pricing, improves GDDR7 availability, and reduces dependence on a small group of memory suppliers.
The series says the next installment will turn to DDR5 now and DDR6 soon, which should show how the HBM squeeze is feeding into the memory products most consumers and server buyers actually purchase.
AI GPU with HBM memory
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Key Questions
What does ‘HBM ate the fab’ mean?
It means High Bandwidth Memory is taking a larger share of memory wafer capacity, leaving less room for products such as DDR5 and some GDDR7 supply.
Why does AI need HBM?
AI accelerators need huge data flow. HBM sits next to the GPU and provides far more memory bandwidth than conventional graphics memory, helping keep expensive compute chips busy.
Is the shortage confirmed to be artificial?
No. The report argues the squeeze is mainly structural: AI chips need HBM, HBM uses more wafer area, and suppliers earn more from it. Claims about supplier conduct would require separate evidence.
Why are graphics cards affected?
Consumer GPUs use GDDR7, not HBM, but the same memory suppliers and fab decisions influence availability. The report cites industry reporting that RTX 50-series output was cut as GDDR7 supply tightened.
What could ease the memory crunch?
More HBM4 output, better yields, and added wafer capacity could help. The timing depends on how quickly SK Hynix, Samsung and Micron can ship at scale.
Source: Thorsten Meyer AI
